**LEARN**

# Why Erasure Errors Are So Good for the Quantum Circuits Dual Resonator Qubit Approach

##### By Team QCI

In this post, we expand on erasure errors and why they’re so much better for quantum error correction than more widely known errors, like bit flips.

We’ll start by recapping what erasure errors are in the context of QCI’s Superconducting Dual Rail Qubits (SDRQs). As a reminder, QCI’s SDRQs are the architecture of choice for scalable quantum error correction, which puts us on the road to fault tolerant quantum computing.

One of the reasons SDRQs are so compelling for us is precisely because erasure errors are one of the dominant error channels that we have to contend with. Recall that a “logical 0” for our dual rail qubits is when there is one photon in the left cavity and 0 photons in the right; “logical 1” is the reverse – 0 photons in the left and one in the right.

Without any erasure errors, there will always be a total of one photon across both cavities. If, however, the photon leaves (or decays) due to unwanted interactions with the environment (known as decoherence), or a *new* photon enters the SDRQ, an erasure error is said to have occurred.

In QCI’s systems, the probability of a photon leaving is far greater than a photon entering, so we consider only the former scenario. In that case, when a photon leaves, there are no photons in either of the cavities, and our SDRQ is in a *known* state! Contrast this with conventional qubits, which undergo bit and phase flips, leaving qubits in *unknown* states.

It turns out that this erasure mechanism is far easier to correct than something like a bit flip error for standard quantum error correction codes. This is why erasure errors are so good. The design of the SDRQ has dramatically reduced the effect of one challenging class of errors, like bit flips, and replaced it with another, easier class of errors to fix – erasures.

In our scheme, to fix erasure errors, two capabilities are needed. First, very good State Preparation and Measurement (SPAM), and second, real-time feedback with our control system. We have both. Our SPAM has recently been measured to be 99.999% – world-class. With our control system, we can perform some of the most cutting edge algorithms out there using real-time control flow (Lubinski, et. al.).

The rest of the surface code paradigm takes care of the rest, with each qubit in the surface code being an SDRQ. Erasure errors are much more forgiving, in fact, regarding the resources required with the surface code, so in the end, we will require less hardware overhead to build up our error correction capability.

Innovations such as these are a testament to the power of a hardware-efficient architecture in superconducting 3D cavities.

For more information on erasure errors and how they fit into the surface code, please see the following publication by Teoh et. al. from the Schoelkopf lab at Yale University: https://arxiv.org/pdf/2212.12077.pdf.